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How to: Upgrade u-boot and loader on SRX Branch Devices using TFTP method

  [KB14175] Show Article Properties


Summary:
How to: Upgrade u-boot and loader on SRX Branch Devices using TFTP method.
Symptoms:
Some older hardware may require a u-boot and loader update. For upgrades with JUNOS 10.0R1 is later, follow the Shell command method outlined in KB16317 - How to: Upgrade u-boot and loader on SRX Branch Devices using TFTP method.

For 9.6 or earlier releases or if any issue is encountered with the Shell command method, the procedure to upgrade by using the TFTP method can be used.

This article is applicable to the following devices:

  • SRX 100

  • SRX 110

  • SRX 210

  • SRX 220

  • SRX 240

  • SRX 550

  • SRX 650

Upgrading u-boot and loader requires console access and an external TFTP server that is reachable via the ge-0/0/0 interface. In this example, assume the following parameters:

  1. TFTP server is 172.19.50.129.

  2. Device IP is 172.19.46.94/24.

  3. Default Gateway for device is 172.19.46.1.

  4. Files for u-boot (u-boot-crc.bin) and loader (loader_crc) are already uploaded to the root directory of the TFTP server.

    Note: filenames may change between image versions.
Cause:

Solution:
The procedure to upgrade u-boot and loader is as follows:

You can also refer to KB14175 - How to: Upgrade u-boot and loader on SRX Branch Devices from Shell.

Also - The JUNOS 10.0 image contains the latest boot loader binaries in the following path: /boot/uboot, /boot/loader.
  1. Upgrade u-boot by rebooting the device. Note build time for old u-boot on console window.
    U-Boot 1.1.6 (Build time: Nov  3 2008 - 14:31:43)
    
    BOARD ID IS 0x521 
    SRX_210_HIGHMEM board revision major:0, minor:0, serial #: pr4692
    OCTEON 9600, Core clock: 400 MHz, DDR clock: 200 MHz (400 Mhz data rate)
    DRAM:  1024 MB
    Flash:  4 MB
    Clearing DRAM........ done
    ERROR: Unable to allocate linux reserved memory (addr: 0x100000, size: 0x8000000).
    BIST check passed.
    Starting PCI
    PCI Status: PCI 32-bit
    PCI BAR 0: 0xf8000000, PCI BAR 1: Memory 0x00000000  PCI 0x00000000
    Net:   octeth0
    USB:   scanning bus for devices... 3 USB Device(s) found
          scanning bus for storage devices... 1 Storage Device(s) found
     
    Press SPACE to abort autoboot in 10 seconds
    
  2. Press the Space Bar at this point to get to the u-boot prompt (=>). Enter system and server parameters with setenv command.
    => setenv serverip 172.19.50.129
    => setenv ipaddr 172.19.46.94
    => setenv netmask 255.255.255.0
    => setenv gatewayip 172.19.46.1
    => save
    Saving Environment to Flash...
    Un-Protected 1 sectors
    Erasing Flash...
    . done
    Erased 1 sectors
    Writing to Flash... writing to flash...
    done
    Protected 1 sectors
    
  3. Test for TFTP server reachability. This may fail the first time so retry until it succeeds.
    => ping 172.19.50.129
    Using octeth0 device
    octeth0: Up 1000 Mbps Full duplex (port  0)
    ping failed; host 172.19.50.129 is not alive
    
    => ping 172.19.50.129
    Using octeth0 device
    host 172.19.50.129 is alive
    
  4. Upload u-boot image to the device and then perform u-boot upgrade.
    => tftpboot 0x100000 u-boot-crc.bin
    Using octeth0 device
    TFTP from server 172.19.50.129; our IP address is 172.19.46.94; sending through gateway 172.19.46.1
    Filename 'u-boot-crc.bin'.
    Load address: 0x100000
    Loading: ##################################################################
            ############################
    done
    Bytes transferred = 473516 (739ac hex)
    
    => bootloader upgrade u-boot active 0x100000
    Checking sanity of backup u-boot...
    WARNING: Image with missing CRC header.
    Do you want to continue? [Y/N] (Default: N)y
    Un-Protected 8 sectors
     
    ........ done
    Erased 8 sectors
    writing to flash...
    Verifying the new u-boot... OK
    
    
  5. Reboot the device. Upon reboot, note the build time has changed. When prompted again, return to u-boot prompt to upgrade loader.
    => reset
    
    U-Boot 1.1.6 (Build time: Apr 29 2009 - 16:07:59)
    
    SRX_210_HIGHMEM board revision major:0, minor:1, serial #: pr4692
    OCTEON CN5020-SCP pass 1.1, Core clock: 400 MHz, DDR clock: 200 MHz (400 Mhz data rate)
    DRAM:  1024 MB
    Flash:  4 MB
    USB:   scanning bus for devices... 3 USB Device(s) found
           scanning bus for storage devices... 1 Storage Device(s) found
    POST Passed
    Clearing DRAM........ done
    ERROR: Unable to allocate linux reserved memory (addr: 0x100000, size: 0x8000000).
    BIST check passed.
    Starting PCI
    PCI Status: PCI 32-bit
    PCI BAR 0: 0xf8000000, PCI BAR 1: Memory 0x00000000  PCI 0x00000000
    Net:   octeth0
    Warning: octeth0 MAC addresses don't match:
    Address in SROM is         00:21:59:27:FA:C0
    Address in environment is FFFFFFC0:FFFFFFFA:27:59:21:00
     
    Press SPACE to abort autoboot in 10 seconds
    
    
  6. Once back at => prompt, recheck TFTP server reachability.
    => ping 172.19.50.129
    Using octeth0 device
    octeth0: Up 1000 Mbps Full duplex (port  0)
    host 172.19.50.129 is alive
    
    
  7. Upload loader image to the device and then perform loader upgrade.
    => tftpboot 0x100000 loader_crc
    Using octeth0 device
    TFTP from server 172.19.50.129; our IP address is 172.19.46.94; sending through gateway 172.19.46.1
    Filename 'loader_crc'.
    Load address: 0x100000
    Loading: ##################################################################
            #################################################################
            ###############################
    done
    Bytes transferred = 821457 (c88d1 hex)
    
    => bootloader upgrade loader 0x100000
    Un-Protected 16 sectors
     
    ................ done
    Erased 16 sectors
    writing to flash...
    Verifying new loader image...OK
    
    
  8. Reboot the device again.
    => reset
    
    U-Boot 1.1.6 (Build time: Apr 29 2009 - 16:07:59)
    
    SRX_210_HIGHMEM board revision major:0, minor:1, serial #: pr4692
    OCTEON CN5020-SCP pass 1.1, Core clock: 400 MHz, DDR clock: 200 MHz (400 Mhz data rate)
    DRAM:  1024 MB
    Flash:  4 MB
    USB:   scanning bus for devices... 3 USB Device(s) found
           scanning bus for storage devices... 1 Storage Device(s) found
    POST Passed
    

Let the device boot completely. This completes this process.
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