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[QFX] Understanding Port Channelization Mapping in QFX10000-30C and QFX10000-60C



Article ID: KB35849 KB Last Updated: 07 Apr 2021Version: 2.0

The line cards in QFX10000 modular switches combine a Packet Forwarding Engine (PFE) and Ethernet interfaces in a single assembly. Line cards are field-replaceable units (FRUs) that can be installed in the line card slots at the front of the switch chassis. 

Channelized interfaces enable you to configure a number of individual channels that subdivide the bandwidth of a larger interface and minimize the number of Physical Interface Cards (PICs) that installation requires.

This article explains in detail how the ports on QFX10000-30C and QFX10000-60C switch variants are made available and disabled while considering channelization. The article also describes the "fifth port disabled" concept in some detail.


Beginning with Junos OS Release 17.1R1, 40-Gigabit Ethernet ports on the QFX10000-30C line card can be channelized to 10-Gigabit Ethernet. The QFX10000-30C and QFX10000-60C line cards do not have port groups; instead, port behavior is tied to the ASIC that is associated with the port. Therefore, you must configure each port individually in order to channelize a 40-Gigabit Ethernet port to four independent 10-Gigabit Ethernet ports using copper or fiber breakout cables.

Further, when these ports are in channelization mode, every fourth port is disabled. Let's consider the following table to understand how the actual ports are marked as "available" or "disabled" for channelization.


Port Mapping: QFX10000-30C

       ASIC                 Physical Ports available in each PFE      Physical Ports available for Channelization Physical Ports that become disabled
PE0  0,2,4,6,8  0,2,4,8 6
PE1 1,3,5,7,9  1,3,5,9  7
PE2 10,12,14,16,18 10,12,14,18 16
PE3 11,13,15,17,19  11,13,15,19  17
PE4 20,22,24,26,28 20,22,24,28 26
PE5 21,23,25,27,29 21,23,25,29 27

You can see that every fourth port in the specific PE chip is disabled. 

The same rule applies to Port Mapping on QFX10000 60C as well.


Port Mapping: QFX10000-60C

       ASIC                  Physical Ports available in each PFE Physical Ports available for Channelization Physical Ports that become disabled
PE0 30,32,34,36,38 30,32,34,38 36
PE1 31,33,35,37,39 31,33,35,39 37
PE2 40,42,44,46,48 40,42,44,48 46
PE3 41,43,45,47,49 41,43,45,49 47
PE4 50,52,54,56,58 50,52,54,58 56
PE5 51,53,55,57,59 51,53,55,59 57
PE6 0,2,4,6,8 0,2,4,8 6
PE7 1,3,5,7,9 1,3,5,9 7
PE8 10,12,14,16,18 10,12,14,18 16
PE9 11,13,15,17,19 11,13,15,19 17
PE10 20,22,24,26,28 20,22,24,28 26
PE11 21,23,25,27,29 21,23,25,29 27

For QFX10000-60C port representation, refer to Port Mapping for QFX10000 60C.


Modification History:

2021-04-07: Port mapping corrections made to reflect valid information

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