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Understanding Port Channelization schema for QFX5210-64C on Junos OS 19.1R1 and Later

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Article ID: KB37498 KB Last Updated: 02 Oct 2021Version: 1.0
Summary:

This article explains Port Channelization schema for QFX5210-64C running Junos OS 19.1R1 and later.

Symptoms:

Some higher-order ports (32-63) might be disabled due to port Channelization configuration.

Solution:
  • Channelization is supported but it is not restricted to the first 32 front panel ports. However, it is better to use the lower order ports for Channelization for ease of used/unused port calculation.
  • The HW support’s 64 user/PHY ports are mapped to BCM logical ports. BCM provides the 128 logical ports and theys are divided into 4 blocks/pipes.
  • Each pipe can accommodate 32 logical ports. So each pipe is mapped with 32 logical ports and 16 user/PHY ports. 
  • You can channelize (4X25G or 4X10G) 8 user ports per pipe. It will utilize all 32 logical ports in that pipe. To achieve this, disable the required higher-order user ports (32 to 63) on that pipe.

Calculation Principle:

After 5 ports are channelized, each additional channelization on that pipe will start disabling ports in the higher-order (32 to 63) on that pipe, such as the bottom user ports on that device.


Two steps for easy Calculation:

  • The first channelized 5 ports consume all the BCM Ports, left 1 free logical port remaining and disabling no ports.
  • Starting from the channelized 6th port, every new channelized port will consume extra 4 ports (logical or physical). Extra physical higher-order ports will be disabled in this case.

Examples (using Block1):

Case 1:
5 channelized ports (ports 0-4)

0
1
2
3
4
5
6
7
32
33
34
35
36
37
38
39
  • No disabled ports and 1 free logical port remained.
  • Ports (5 to 7,34 to 39) can be used as 40G or 100G.
 

Case 2:
6 channelized ports (ports 0-5)

0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
  •  6 channelized ports require 24 local ports.
    ~ 4 extra ports to be used > the PHY port# 5 + 1 free logical already exist + 2 x user ports (#32,33)
  • The higher-order ports, 32 and 33 are disabled and the remaining 8 ports (6,7,34 to 39) can be used as 40G or 100G
 

Case 3:
7 channelized ports (ports 0-6)

0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
  •  7 channelized ports require 28 local ports.
    ~ 4 extra ports to be used > the PHY port# 6 + 3 x user ports (#34 to 36)
  • The higher-order ports (34 to 36) are disabled and the remaining 4 ports (7,37 to 39) can be used as 40G or 100G
 

Case 4:
8 channelized ports (ports 0-7) ~ Max per block

0 1 2 3 4 5 6 7
32 33 34 35 36 37 38 39
  • 8 channelized ports requires  32 local ports.
    ~ 4 extra ports to be used > the PHY port# 7 + 3 x user ports (#37 to 39)
  • The higher-order port (37 to 39) are disabled and NO remaining ports can be used as 40G or 100G
 

Troubleshooting:

From FPC shell more, use “show cmqfx dis_portmap
 
FPC0(bng-sw-azurite-p1-d vty)# show cmqfx dis_portmap   
 
PORT  CHAN_PORT  PIPE
32       5        1
33       5        1
34       6        1
35       6        1
36       6        1
44      19        2
45      19        2
47      46        2
48      46        2
49      46        2
 

Example output:

- port 32,33 are disabled because of the channelized port 5 in pipe/block 1
- port 34,35,36 are disabled because of the channelized port 38 in pipe/block 1
- port 44,45 are disabled because of the channelized port 19 in pipe/block 2
- port 47,48,49 are disabled because of the channelized port 46 in pipe/block 2
 

Best Practice:

Use the lower-order ports (0-31) for port channelization and expect all higher-order ports (32-63) to be disabled per block in case of using 8 Channelized ports.
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